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Old February 12th 04, 08:09 AM
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"Dave Shrader" ha scritto nel messaggio
news:9qwWb.148648$U%5.678050@attbi_s03...
Cb = K1*(er*eo*Thickness*length)/spacing.
Co = K2*eo*thickness*length/spacing

er = relative permitivity of board material
K1 = percentage of E field in dielectric material ~ 30% - 40%
K2 = percentage of E field in air ~ 70% - 60%
eo = relative permitivity of air
thickness = thickness of copper cladding
length = length of parallel paths
spacing = spacing between parallel paths.

Note: there are two capacitors in a single layer PCB. The path through
air and the path through the board material. You sum the total of both
capacitances.

er for most boards is between 2 and 4.

Design your initial capacitor on a sample board and refine the K1, K2
and er terms.

DD


Thankx Dave, I'll try.