On Wed, 26 May 2004 02:07:50 GMT, "Lord Snooty" wrote:
To clarify
a) "Load" in my context means "load resistor (r) and load capacitor (reactance
jx) in series"
b) The output transistor feeds to the output port through an inductor. One
would therefore expect X, the source reactance, to be positive.
Hi Andrew,
a load capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to produce a
minimum in the total voltage across the load.
What was the voltage?
Also, as capacitance was increased over the range 100-700pF, the voltage across the load resistor
increased monotonically.
What were the voltages?
The latter is easy to explain (it means the source reactance is positive, and
smaller than +j28.4 ohms), but the former is beyond my ken.
as the capacitive reactance falls, you note the voltage climbs, this
hardly requires an inductance to explain this. Simple divider action
serves quite well. You have since revealed the inductor buffered
output, but the data is still pretty skimpy to bless it as the major
contributor to source Z.
What are you using to measure this voltage?
73's
Richard Clark, KB7QHC
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