I don't believe chokes should be necessary. Good 0.1 or 0.01 at each
package should be enough. Parallel bypass caps is not a good idea because
the larger one will go inductive above its self resonant freq and resonate
with the other creating a parallel resonant, high impedance "non-bypass".


HOWEVER...

Make sure your ground paths are isolated from each other. The digital chip
ground path should have nothing in common with the VCO and Phase Det
grounds. The VCO is extremely sensitive to any voltage variations between
ground and its supply and if you have ground variations and a good supply,
it is just like power supply ripple.
All the digital grounds should go directly back to the supple input to
the board and the analog grounds the same and this must be two completely
isolated paths.

Sometimes *cutting* ground paths around a VCO improves spurs.


GOOD:

VCO GND -----------------------\
\
-Supply GND
/
/
TTL GND -----------------------


BAD:

VCO GND --\ This run *HAS* impedance and
\ voltage drop in the form of pulses.
----------------------Supply GND
/ And there fore modulates the VCO.
/
TTL GND --


73, Steve, K9DCI


"John Wilkinson" wrote in message
.. .
Hi,
If I have a few TTL chips on the same PCB as all my PLL's (see previous
threads). Would it be a good idea to put a little choke in the supply line
up against each TTL chip, with cap decoupling either side?

What about 100uH and 2 100nF?

Will that reduce any noise problems I have?

Thanks,
John.