Ben Jackson wrote:
On 2006-07-12, Roy Lewallen wrote:
The Class C transistor amplifiers I design and use most certainly
saturate. I believe that's standard practice for solid state amplifiers.

And as a followup, is the power dissipation in the final controlled
by the duty cycle of the pulses (or number of degrees of conduction
more generally if the input is not a square wave)?

For operation at HF and higher, it's not always that simple.

For anything but the lowest-speed PWM/class C/class D/class E
operations, the transistor switching time (and the influence of the
load on the switching time) can be a most important contributor to
power dissipated in the device.

An indication of the "bare transistor" switching time can be found on
the datasheets as the delay time, rise time, and most importantly
storage time and fall time.

Very closely related if you are operating anywhere near max power
dissipation or max current is the SOA curve.

Tim.