Thanks to all who responded. I think I'm starting to understand this.
LTSpice helps a lot. I set up a class C amp and looked out power
dissipated in the transistor vs. power dissipated in the load. The big
efficiency gains that come with saturation were very apparent.
To better understand WHY this happens, I set up a spreadsheet that
looked at power dissipated in a variable resistor as it swept from .1
ohms to 10 ohms. It had a fixed 10 ohm resistor in series and 10 volts
DC across both of them. Yes indeed, the power disspated in the
variable resistor drops off dramatically when the resistance (and hence
the voltage across it) gets very low. I guess is why this happens in
the saturating Class C amp, Right?
But I still have some questions. When we design a Class A amp, the
familiar formula Rload = (Vcc-Ve)^2/2Pout allows us to come up with a
load value that will prevent the amplifier from saturating. A load of
this value will cause the voltage across the transistor (collector to
emitter) to vary from zero to twice Vcc. But it won't go into
saturation.
Why then do so many of the books (EMRFD, SSDRA, the W1FB books) call
for the use of essentially the same formula for the load when selecting
a load for Class C amps? We're no longer worried about staying out of
saturation, correct? In fact, we want to saturate. So why the same
formula? In fact, it seems to me that if you have a Class C amplifier
that is designed with this formula and is operating just below
saturation, you can get it to saturate just by increasing the value of
the load presented to the collector. Power out and efficiency
immediately improves. Linearity, of course, does not.
Thanks, 73 Bill M0HBR
http://www.gadgeteer.us
On Nov 4, 6:34 pm, wrote:
Back in July I wrote:
I'm reading David Rutledge's excellent "The Electronics of Radio."
In Chapter 10 -- Power Amplifiers, he discusses Class C amps and says,
"In addition, if we drive the transistor clear to saturation, using the
transistor as a switch, the dissipated power can be greatly reduced,
because the saturation voltage is low. This is Class C
amplification..."
I'd always throught that in Class C, while you'd operate the device so
that it was cutoff during most of the cycle, but not saturated.
Is this just a different definition of Class C?
I checked back with SSDRA and EMRFD, and didn't see anything about
driving Class C amps into saturation?
What says the group? Do we saturate in Class C or not?
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I've been thinking about this some more. The 1980 ARRL handbook points
out that "Solid State power amplifiers should be operated just below
their saturation points for best efficiency and stability." Also, the
formula that we use to determine load resistance (Rl=Vcc^2/2Po) implies
that we are looking for a combination of Vcc, Load resistance and power
out that will prevent saturation.
And wouldn't we end up with far lower harmonic content if we only clip
one side of the wave form (at cutoff) instead of both sides (cutoff and
saturation)?
I know there are more exotic modes beyond C, but for plain old ordinary
ham radio applications, don't we normally avoid saturation in Class C
amps?
Also, what about this business of having the efficiency improve through
saturation "because the saturation voltage is low" Could that be
right? If you put a voltage across a conductor and generate a large
current, you can't sit back and say "Great! Power consumption across
the conductor is low because the voltage drop across it is now
minimal!"
73 from London
Bill M0HBR N2CQR CU2JLhttp://www.gadgeteer.us