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help designing gimmick capacitor
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February 20th 11, 07:16 PM posted to sci.electronics.design,rec.radio.amateur.homebrew
John Larkin
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First recorded activity by RadioBanter: Oct 2006
Posts: 21
help designing gimmick capacitor
On Sun, 20 Feb 2011 10:13:12 -0800 (PST),
wrote:
On Feb 20, 12:39*pm, John Larkin
wrote:
On Sun, 20 Feb 2011 09:20:12 -0600, "amdx" wrote:
Hi all,
I finished the amp that had the 5 Ghz transistor, I changed it to a slower
one.
The objective of this amp is to cause minimal loading of the circuit it is
measuring.
When I install the box cover the voltage gain drops by 7%, so I think the
input capacitor
plate is being loaded by the cover.
The input capacitor plates can be seen here;
http://i395.photobucket.com/albums/p...mspaced5mm.jpg
The plates are 1 cm x 1 cm spaced 5 mm apart.
I have thoughts about *rectangular plates 0.25 cm x 4 cm to get more
distance from the top cover, (and the bottom.)
Or a real gimmick cap where I twist a couple of 39 Gauge wires together and
attach opposite ends to input and output.
*Any ideas to minimize input capacitance to the box?
Here's the amp in box.
http://i395.photobucket.com/albums/p...erampinbox.jpg
This is the original circuit page with schematic;
http://www.crystal-radio.eu/enfetamp.htm
One gotcha: with +12 on the drain of the jfet, expect a lot of gate
current. Hot carriers or some such.
* * * * * * * Thanks, Mike
PS, I was having trouble getting some close-up pictures, I grabbed a
magnifying glass and took some
pictures through that, works good.
Use a real surface-mount 0.3 pF cap, or a homemade coaxial cap. The 1
cm square plates are too big and have their own capacitance to the
world.
For that matter the tiny input cap in Mike's circuit is
counterproductive--it divides the signal down and makes the gain
unpredictable.
Better: use 10pF coupling, lose less at the input, and use less gain
later. Bootstrap the FET so the input sees very low C. Do those and
you don't even need a gimmick.
Bootstrap the drain of Q1.
"T" means transformer, which shows that this circuit was done by an
amateur. All that tricky stuff could be replaced by one opamp.
It could have close to zero Cin with a little positive feedback.
John
I like the one at the top of pg. 2:
http://www.national.com/an/AN/AN-32.pdf
1970--a classic.
If the jfet drives a non-inverting opamp with gain, one could
over-bootstrap the drain to hit zero or even negative input
capacitance; tweak that with a pot or a small variable cap. Then, as
you say, dump the 0.3 pF input cap and have predictable gain.
Phil Hobbs likes this:
+-----------+-----Vcc
| |
| |
| R
| |
c |
b----+-----+ ~~ +3V
e | |
| | |
| | |
d C R
in----------g | |
s | |
| | gnd
| |
+-----+-----------out
|
|
|
R or current sink
|
|
|
Vee
John
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