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Old February 19th 04, 02:33 AM
budgie
 
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On Wed, 18 Feb 2004 13:07:48 -0000, "Hans Summers"
wrote:


"budgie" wrote in message
.. .
On Wed, 18 Feb 2004 09:17:11 GMT, (Mike W)

wrote:

I have a need to produce an accurate 4Mhz 50% dutycycle TTL squarewave
to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy. How can I
divide this to produce the 50% duty cycle 4Mhz signal?. Is it even
possible with logic alone?. I can see how to mix with either 6Mhz or
14Mhz, but this then detracts from the required accuracy.


Several approaches spring to mind. You stated "accurate" - they all

provide
that, but jitter is introduced in all of them:

1. VCO at 4MHz, divide by 4 and lock to Fref = 1MHz from your 10 Meg

source
divided by ten.

2. VCO at a multiple of 10M - say 40 MHz - locked to your 10M ref and
divided down (by in this case 10) to give 4 MHz output.


I would suggest using a 4MHz crystal oscillator as your VCO. Small varicap
to alter the VXO frequency (or use an ordinary diode or LED as the varicap,
see
http://www.hanssummers.com/radio/varicap/varicap.htm). The inherent
stability of the VXO will allow you to use a very slow PLL, which will
result in minimal jitter.


Agreed, a VCXO is a good way to go if you do need a VCO.

Remember, the o/p didn't reference any jitter sensitivity in the task, which may
be simple timing or gated counting of a pulse train. Neither is
jitter-sensitive.

If jitter isn't an issue, I'd personally KISS and go with #3. Small footprint,
small dissipation, no tuned circuits, no PLL parameters to calculate, no VCO's
to build, no VCXO's or xtals to buy. Only one RC time constant to calculate (or
optimise by SOT) to minimise jitter if inclined to bother.