On Thu, 12 Aug 2004 02:58:57 GMT, Fred Bloggs
wrote:



John Larkin wrote:


Looks like the jfet will be saturated with the values shown, not good
for RF work. Looks like he got the sign of Vgs backwards. The next
example on the same page illustrates that Vg must be near zero, not
+5. Really silly, putting these two circuits side-by-side.

John


Shhhh...don't tell the resident idiot, but it's going to be damn tough
biasing that IDSS=5mA JFET to a quiescent ID=10ma....


Good point. Bowick seems to be applying the jfet gate-voltage equation
backwards to enhance it! The other example on page 120 is even
sillier.

Just shows you that an RF expert can't always handle DC.

John