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On 05/08/17 14:34, Chris wrote:
On 08/05/17 09:45, Jeff wrote: Rubbish, the function of a phase locked loop is to keep the phase of the 2 signals the same, within the constraints of the loop filter. The clock *never* achieves this, it is open loop and applies a 'kick' to one pendulum the amplitude of which is NOT related to the difference in phase of the 2 pendulums. The amplitude is not, but the frequency is - why do you think the amplitude should be related to the difference in phase? A fixed kick is given without any knowledge that it will be of the correct amplitude to achieve an in phase or near in phase condition. There is NO feedback of an error signal that relates to the phase difference between the 2 pendulums. Ah, yes there is, see below. The only time phase comes into the picture is the timing of when the 'kick' is given, so as not to disrupt the normal swing of the pendulum, and whether or not to give a kick at all. Are you referring to the kick given to the master pendulum? That is not part of the PLL system. The kicks given to the master pendulum are specifically designed not to affect the phase of the master pendulum at all. If not, if you are referring to the kick given to the slave pendulum (these are quite different kicks) that is not how the clock works. The slave pendulum is kicked from time to time, ad kicked a little more often when the phases get too far apart - the difference in phases is the error signal mentioned above - and these kicks do affect the phase of the slave pendulum. Exactly. The control is single path, master to slave, with no feedback to the reference, making it an open loop design. The master has no knowledge of the state of the slave at any time. That is exactly what a PLL is - and it is almost (though not quite) what this clock does. It is certainly what the slave does. In a pll, there is continuous Not necessarily continuous - a bang-bang action is allowable, and does not prevent a system from being a PLL. feedback from the vco to the phase detector, closing the loop and keeping the phase offset constant, A PLL does not necessarily keep the phase offset constant, just within the interval =/- 2pi. The phase is continuously updated every cycle, Not necessarily continuously updated, or updated every cycle - as long as the offset is continuously within the range -2pi to 2pi, the phases are locked. whereas the Shortt clock can have significant accumulated error in the time between corrections... Yes - but that doesn't mean it is not a PLL, as long as the error is less than +/- 2pi. A phase-locked loop is a system which produces a (slave) vibration the integral of whose phase in comparison to the phase of another (master) vibration is continuously between -2pi and 2pi over long periods. A last requirement is that the phase-locked loop system should have no effect whatsoever on the master vibration. That's it. If it does that, the phases are locked - they may not be tightly locked, but the vibrations do not skip or add beats. More advanced PLLs might keep the difference between phases much smaller, as in this clock - but that is not a requirement of a PLL. There is no such thing as absolutely tightly locked, there is only unlocked or locked. Neither is continuous updating necessary, though the integral should be continuously in that interval. In this clock the hit-and-miss synchroniser action undoubtedly does act as a PLL. However it might be argued that the slave does subsequently have some (very small) input to the master, when it operates the gravity drive (whuzzat? I am not a clockmaker). That certainly has an effect on the amplitude of the master; although as the idea an intention and practical effect is that it has no effect whatsoever on the phase of the master, thus the slave clock action overall most definitely should be considered a PLL. -- Peter Fairbrother ps; the +/- 2pi bit is not really a requirement either, as long as the system can keep count of the missing/extra beats - but as most systems don't do that we shall just gracefully ignore that for now .. |
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