Richard Clark wrote:
S-params may be useful for comparing devices, but are inadequate for
power application design - unless, of course, you can tolerate 400%
error and inverted reactances.

The actual subject of the s-parameter analysis was a linear Z0-match
network point, not an amplifier, so your statements are irrelevant.
--
73, Cecil http://www.qsl.net/w5dxp



-----= Posted via Newsfeeds.Com, Uncensored Usenet News =-----
http://www.newsfeeds.com - The #1 Newsgroup Service in the World!
-----== Over 100,000 Newsgroups - 19 Different Servers! =-----

"Richard Clark" wrote in message
...
Hi Guys,

I trust both of you appreciate the difference between a vaguely
described system and trying to fit a spec sheet to it. Far easier to
proceed direct from one or the other, but making a fit between the two
is like stepping from one boat to another with a high chance of
standing on neither.

73's
Richard Clark, KB7QHC

There are uncharacterised components surrounding my MRF136, and I'd rather
determine their lumped behaviour with the transistor than unsolder them one by
one and try and predict the answer. But that's because I think it's possible
to determine what's going on. One reason I *don't* think this is the following
little bench test this afternoon - with the load jammed directly on the amp
output; no cable, no VSWR meter.
At 8.000 Mhz and a load consisting of 50 ohms carbon 10W 10% in series with a
capacitance trimmer bank, at an output power level of about 2W, a load
capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to produce a
minimum in the total voltage across the load. Also, as capacitance was
increased over the range 100-700pF, the voltage across the load resistor
increased monotonically.

The latter is easy to explain (it means the source reactance is positive, and
smaller than +j28.4 ohms), but the former is beyond my ken.

Best,
Andrew

On Mon, 24 May 2004 05:46:01 GMT, "Lord Snooty" wrote:

At 8.000 Mhz and a load consisting of 50 ohms carbon 10W 10% in series with a
capacitance trimmer bank, at an output power level of about 2W, a load
capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to produce a
minimum in the total voltage across the load. Also, as capacitance was
increased over the range 100-700pF, the voltage across the load resistor
increased monotonically.

The latter is easy to explain (it means the source reactance is positive, and
smaller than +j28.4 ohms), but the former is beyond my ken.

Best,
Andrew

Hi Andrew,

You got me confused too.

Is the "load" the resistor, or the resistor-cap combination when you
measure these voltages?

You describe a voltage minimum across the load for a cap setting of
250pF; but you also maintain that the voltage across the load
increases for the variation in capacitance from 100 to 700pF which
contradicts the first measurement.

Further, the construction of a high power semiconductor does not lend
itself to supporting inductive reactances (the junctions are quite
manifestly capacitive in structure). By specification the device is
characterized as exhibiting 27pF @ 1 MHz (for 28Vdc although there is
not much variation until below 10Vdc). There are a world of other
variables to consider, but none portray inductance within the device.
This alone should provoke you to re-examine your premise.

73's
Richard Clark, KB7QHC

Comment imbedded:

"Dave" wrote in message
...
ok, bonzo, i'll bite on the troll bait. ...

"Lord Snooty" wrote in message
nk.net...
...RF power amp feeding directly into a VSWR meter,
...into a load consisting of a carbon resistor and a variable
capacitor rigged in series. The meter connects to the load via about a
foot of 50 ohm coax. The frequency is between 1 and 10 MHz.
Model the source impedance as Zs = R + jX, and the load impedance as Zl
=
r +
jx (or use phasors if you prefer .
The following two statements are true:
1) The power dissipated in the load (r) is maximised when x = -X
(so-called
"conjugate matching"), whatever the value of (r).

wrong. you must transform the R+jX along the transmission line to get
back
to the load seen by the source. you stipulate a low frequency and short
line, so you are close anyway.

The "transform along the coax" part is correct, but the "power is
maximised" part can be VERY misleading folks.

P.S. Get this MPT theorm blockage out of your minds... It is a synthetic
restriction.
The "maximum power therom" (ZL=Zs) ONLY applies to ONE special case, NOT
all cases. That case is where the source's output power (or if you like
current) capability is limited ONLY by the two resistances. That is, the
case is when the source can put out all the power needed by these resistors
and no other internal limit dominates. A common circuit can be shown to
give maximum power at other than Zs=ZL (aparently violating the above
referred-to therom). There are things other than these resistances that
limit the output power of a
practical source.... (see how long this thread goes.....



2) The classical VSWR is minimised (zero "reflected power") when x = +X,
whatever the value of (r).

doubly wrong. vswr is on a cable and is independent of the source.

Without plodding through the rest, it appears Dave has a handle on the
error.



--
Steve N, K,9;d, c. i My email has no u's.

it
knows nothing of R+jX only the characteristic impedance of the cable. all
following calculations are wrong for this reason alone.


However, my VSWR meter, whch is a conventional 2-diode bridge and short
transmission line, indicates that minimum indicated VSWR
corresponds to max power dissipated in (r).!! (i.e. at conjugate match,
and
NOT when reflected power is zero).

The equation normally used for VSWR is
VSWR = ABS( (1 + |p|) / (1 - |p|) )
where
p = (Zl - Zs) / (Zl + Zs)

wrong again, the impedance used must be that of the cable not of the
source.
its not worth commenting further until you understand this.

and p is a measure of the amount of power reflected back to the source,
called
the "voltage reflection coefficient"

I plotted something I call "conjugate VSWR" or VSWR*. which is the same
expression as above, but with p defined as
p = (Zl - Zs*) / (Zl + Zs)
where Zs* indicates the complex conjugate of Zs.
and the behaviour of this VSWR* thingie absolutely matches what I see on
my
meter. Aye, there's the rub.

Some points to note
a) Classical VSWR shows NO minimum for all r, when x has the opposite
sign
to
X
b) VSWR* always has a minimum at the same r-value which causes maximum
power
to be dissipated in r, whatever the value of x.

Again, I flat don't understand how my VSWR meter can indicate VSWR* when
I
know it should indicate VSWR.

Here are a couple of links to flesh out the theory.

1. Wade through this at your peril - it's you lot fighting abou this
issue
and
is VERY long


http://www.ibiblio.org/pub/academic/...S/20030831.ant

2. This is much more succint - cut to the chase on p47


http://my.ece.ucsb.edu/yorklab/Usefu...%20AN64-1B.pdf

Best,
Andrew

"Richard Clark" wrote in message
...
On Mon, 24 May 2004 05:46:01 GMT, "Lord Snooty" wrote:

At 8.000 Mhz and a load consisting of 50 ohms carbon 10W 10% in series
with a
capacitance trimmer bank, at an output power level of about 2W, a load
capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to produce a
minimum in the total voltage across the load. Also, as capacitance was
increased over the range 100-700pF, the voltage across the load resistor
increased monotonically.

The latter is easy to explain (it means the source reactance is positive,
and
smaller than +j28.4 ohms), but the former is beyond my ken.

Best,
Andrew

Hi Andrew,

You got me confused too.

Is the "load" the resistor, or the resistor-cap combination when you
measure these voltages?

You describe a voltage minimum across the load for a cap setting of
250pF; but you also maintain that the voltage across the load
increases for the variation in capacitance from 100 to 700pF which
contradicts the first measurement.

Further, the construction of a high power semiconductor does not lend
itself to supporting inductive reactances (the junctions are quite
manifestly capacitive in structure). By specification the device is
characterized as exhibiting 27pF @ 1 MHz (for 28Vdc although there is
not much variation until below 10Vdc). There are a world of other
variables to consider, but none portray inductance within the device.
This alone should provoke you to re-examine your premise.

73's
Richard Clark, KB7QHC

To clarify
a) "Load" in my context means "load resistor (r) and load capacitor (reactance
jx) in series"
b) The output transistor feeds to the output port through an inductor. One
would therefore expect X, the source reactance, to be positive.

Andrew

On Wed, 26 May 2004 02:07:50 GMT, "Lord Snooty" wrote:

To clarify
a) "Load" in my context means "load resistor (r) and load capacitor (reactance
jx) in series"
b) The output transistor feeds to the output port through an inductor. One
would therefore expect X, the source reactance, to be positive.

Hi Andrew,

a load capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to produce a
minimum in the total voltage across the load.
What was the voltage?
Also, as capacitance was increased over the range 100-700pF, the voltage across the load resistor
increased monotonically.
What were the voltages?
The latter is easy to explain (it means the source reactance is positive, and
smaller than +j28.4 ohms), but the former is beyond my ken.
as the capacitive reactance falls, you note the voltage climbs, this
hardly requires an inductance to explain this. Simple divider action
serves quite well. You have since revealed the inductor buffered
output, but the data is still pretty skimpy to bless it as the major
contributor to source Z.

What are you using to measure this voltage?

73's
Richard Clark, KB7QHC

"Richard Clark" wrote in message
...
On Wed, 26 May 2004 02:07:50 GMT, "Lord Snooty" wrote:
Hi Andrew,

a load capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz) was found to
produce a
minimum in the total voltage across the load.
What was the voltage?

Load voltage lies in the 5 to 20 volt peak range, depending on the power
setting.
This minimum represented about a 15% dip.

Also, as capacitance was increased over the range 100-700pF, the voltage
across the load resistor
increased monotonically.
What were the voltages?

Again, a nominal value between 5 and 20 V pk.

The latter is easy to explain (it means the source reactance is positive,
and
smaller than +j28.4 ohms), but the former is beyond my ken.

as the capacitive reactance falls, you note the voltage climbs, this
hardly requires an inductance to explain this. Simple divider action
serves quite well. You have since revealed the inductor buffered
output, but the data is still pretty skimpy to bless it as the major
contributor to source Z.

Agreed, but if I keep increasing the load C (decreasing the capacitative
reactance ), I will see a peak in the voltage across the load resistor, which
will only happen if a conjugate match is occurring.

What are you using to measure this voltage?

A scope probe set to 10x, which has an unmeasurably high DC resistance and a
capacitance of 22 pF (measured). It's a good idea to use the 10x, not 1x,
setting, since the latter contributes about 80 pF, and will change the AC
response of the circuit.

Best,
Andrew

On Thu, 27 May 2004 16:49:26 GMT, "Lord Snooty" wrote:

"Richard Clark" wrote in message
.. .
On Wed, 26 May 2004 02:07:50 GMT, "Lord Snooty" wrote:
Hi Andrew,

a load capacitor value of 250 +/- 10pF (-j80 ohms @ 8 MHz)
was found to produce a minimum in the total voltage across the load.
What was the voltage?

Load voltage lies in the 5 to 20 volt peak range, depending on the power
setting.
This minimum represented about a 15% dip.

Pick ONE power setting. What was the voltage across the load.

Also, as capacitance was increased over the range 100-700pF,
the voltage across the load resistor increased monotonically.
What were the voltages?

Again, a nominal value between 5 and 20 V pk.

Pick the ONE and SAME power setting. What was the voltage across the
load resistor for:
100pF
200pF
300pF
....
700pF

The latter is easy to explain (it means the source reactance is positive,
and
smaller than +j28.4 ohms), but the former is beyond my ken.

as the capacitive reactance falls, you note the voltage climbs, this
hardly requires an inductance to explain this. Simple divider action
serves quite well. You have since revealed the inductor buffered
output, but the data is still pretty skimpy to bless it as the major
contributor to source Z.

Agreed, but if I keep increasing the load C (decreasing the capacitative
reactance ), I will see a peak in the voltage across the load resistor, which
will only happen if a conjugate match is occurring.

This is a violation of terms. Just what constitutes the generator?
At one time you say the combination of the cap-resistor is the load,
hence the source is described ACROSS this series. THEN you isolate
the resistor which pushes the cap back into the source.

You originally asked for the complex impedance of the source, but if
the source contains a variable cap, this makes determination rather a
moving target.

In the world of metrology (folks who measure this stuff for a
living), you have an immutable boundary called the plane of the
source. On one side is everything that can be attributed to the
source and everything on the other side can be attributed to the load.
If there is a transmission line between, then you have two planes, the
plane of the source, and the plane of the load. Everything to the
right of the plane of the load (thinking in a left-right progression)
can be attributed to the load. Between the two planes is a transform.

The plane of the source is commonly the output connector, the plane of
the load is commonly the input connector. Things in between like
tuners, SWR meters, Lines, dividers, splitters, duplexers... are
transforms.

It is perfectly justifiable to make a component like a tuner resident
within (and behind) either plane, but once you do that, it is
considered bad form to go tweaking it and maintain nothing has
happened to the source/load.

What are you using to measure this voltage?

A scope probe set to 10x, which has an unmeasurably high DC resistance and a
capacitance of 22 pF (measured). It's a good idea to use the 10x, not 1x,
setting, since the latter contributes about 80 pF, and will change the AC
response of the circuit.

Perfectly adequate.

73's
Richard Clark, KB7QHC