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#1
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Hello all,
I've already done a post a few days ago about a PLL system I had build. The initial problem was almost solved, but it isn't yet perfect. In fact I made a PLL with a MC145152 IC, that I added to an existing VCO (see http://www.mcarsweb.com/_divers/sche...cation-note_98) .. It works quite well but the output signal, that is fed into the VCO, is varying a bit at a frequency of about 187 KHz (http://www.mcarsweb.com/_divers/oscillo.jpg the vertical scale is enlarged). I don't know if I should adjust the filter values, or add a additional small filter just before the VCO (with a resistor and a capacitor between the output and the ground). What do you think about that ? Thanks in advance for your answers ;-) Damien |
#3
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In article ,
says... Hello all, I've already done a post a few days ago about a PLL system I had build. The initial problem was almost solved, but it isn't yet perfect. In fact I made a PLL with a MC145152 IC, that I added to an existing VCO (see http://www.mcarsweb.com/_divers/sche...cation-note_98) . It works quite well but the output signal, that is fed into the VCO, is varying a bit at a frequency of about 187 KHz (http://www.mcarsweb.com/_divers/oscillo.jpg the vertical scale is enlarged). I don't know if I should adjust the filter values, or add a additional small filter just before the VCO (with a resistor and a capacitor between the output and the ground). What do you think about that ? Thanks in advance for your answers ;-) Damien It's almost impossible to diagnose PLL misbehavior without a spectrum analyzer, or at least a receiver that will let you listen to the output signal. What does it sound like in a receiver? What's the reference frequency (the frequency at which the phase comparison is taking place?) It wouldn't be 187 kHz, would it? -- jm ------------------------------------------------------ http://www.qsl.net/ke5fx Note: My E-mail address has been altered to avoid spam ------------------------------------------------------ |
#4
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Damien
There are two main possibilities (and a few others as John Miles says) First the 187 KHz could be a reference spur if that is the comparison frequency. I note you are using a 10.24 MHz clock. What is the R (reference divider) ratio and main N ratio? These will be entered by software or hardwiring/switching various pins. If the signal is a reference spur than it could be attenuated by an additional pole (RC network) before the VCO A single RC pole will attenuate at 6dB/octave above its corner (3dB) freq, so to get any sort of attenuation, the pole will have to set at about 1/10 of the unwanted signal/reference (say 20 KHz) or lower. Alternatively the signal could mean the loop is unstable, in which case you might have to go back to design basics How did you arrive at the values for the loop filter? Richard Damien Teney wrote in message ... Hello all, I've already done a post a few days ago about a PLL system I had build. The initial problem was almost solved, but it isn't yet perfect. In fact I made a PLL with a MC145152 IC, that I added to an existing VCO (see http://www.mcarsweb.com/_divers/sche...cation-note_98) . It works quite well but the output signal, that is fed into the VCO, is varying a bit at a frequency of about 187 KHz (http://www.mcarsweb.com/_divers/oscillo.jpg the vertical scale is enlarged). I don't know if I should adjust the filter values, or add a additional small filter just before the VCO (with a resistor and a capacitor between the output and the ground). What do you think about that ? Thanks in advance for your answers ;-) Damien |
#5
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Damien
There are two main possibilities (and a few others as John Miles says) First the 187 KHz could be a reference spur if that is the comparison frequency. I note you are using a 10.24 MHz clock. What is the R (reference divider) ratio and main N ratio? These will be entered by software or hardwiring/switching various pins. If the signal is a reference spur than it could be attenuated by an additional pole (RC network) before the VCO A single RC pole will attenuate at 6dB/octave above its corner (3dB) freq, so to get any sort of attenuation, the pole will have to set at about 1/10 of the unwanted signal/reference (say 20 KHz) or lower. Alternatively the signal could mean the loop is unstable, in which case you might have to go back to design basics How did you arrive at the values for the loop filter? Richard Damien Teney wrote in message ... Hello all, I've already done a post a few days ago about a PLL system I had build. The initial problem was almost solved, but it isn't yet perfect. In fact I made a PLL with a MC145152 IC, that I added to an existing VCO (see http://www.mcarsweb.com/_divers/sche...cation-note_98) . It works quite well but the output signal, that is fed into the VCO, is varying a bit at a frequency of about 187 KHz (http://www.mcarsweb.com/_divers/oscillo.jpg the vertical scale is enlarged). I don't know if I should adjust the filter values, or add a additional small filter just before the VCO (with a resistor and a capacitor between the output and the ground). What do you think about that ? Thanks in advance for your answers ;-) Damien |
#6
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Hello,
About the quartz, I haven't used a 10.24MHz one as in the given schematic, but a 5.12 MHz one. The R ratio is 1024, so the reference frequency is 5 KHz. The N ratio used is from 196 to 284 (with the 64/65 prescaler; VCO goes from 63 to 91 MHz). I don't think the loop is unstable, because the VCO output is quite clean (only a bit blur, see http://www.mcarsweb.com/_divers/vco.jpg). The loop filter values have been calculated with the fomulas given in the motorola application note 980. So, if you think I should use a additional RC network, could you tell me how to calculate the values :-$ ? Thank you ;-) Damien |
#7
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Hello,
About the quartz, I haven't used a 10.24MHz one as in the given schematic, but a 5.12 MHz one. The R ratio is 1024, so the reference frequency is 5 KHz. The N ratio used is from 196 to 284 (with the 64/65 prescaler; VCO goes from 63 to 91 MHz). I don't think the loop is unstable, because the VCO output is quite clean (only a bit blur, see http://www.mcarsweb.com/_divers/vco.jpg). The loop filter values have been calculated with the fomulas given in the motorola application note 980. So, if you think I should use a additional RC network, could you tell me how to calculate the values :-$ ? Thank you ;-) Damien |
#8
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Damien Teney wrote:
Hello, About the quartz, I haven't used a 10.24MHz one as in the given schematic, but a 5.12 MHz one. The R ratio is 1024, so the reference frequency is 5 KHz. The N ratio used is from 196 to 284 (with the 64/65 prescaler; VCO goes from 63 to 91 MHz). I don't think the loop is unstable, because the VCO output is quite clean (only a bit blur, see http://www.mcarsweb.com/_divers/vco.jpg). The loop filter values have been calculated with the fomulas given in the motorola application note 980. So, if you think I should use a additional RC network, could you tell me how to calculate the values :-$ ? Thank you ;-) Damien Do you have a 5 kHz notch filter in the control voltage feeding your VCO? It will reduce phase noise in the output. A simple L/C trap will work, but either the coil or cap should be adjustable for maximum rejection. -- Michael A. Terrell Central Florida |
#9
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Damien Teney wrote:
Hello, About the quartz, I haven't used a 10.24MHz one as in the given schematic, but a 5.12 MHz one. The R ratio is 1024, so the reference frequency is 5 KHz. The N ratio used is from 196 to 284 (with the 64/65 prescaler; VCO goes from 63 to 91 MHz). I don't think the loop is unstable, because the VCO output is quite clean (only a bit blur, see http://www.mcarsweb.com/_divers/vco.jpg). The loop filter values have been calculated with the fomulas given in the motorola application note 980. So, if you think I should use a additional RC network, could you tell me how to calculate the values :-$ ? Thank you ;-) Damien Do you have a 5 kHz notch filter in the control voltage feeding your VCO? It will reduce phase noise in the output. A simple L/C trap will work, but either the coil or cap should be adjustable for maximum rejection. -- Michael A. Terrell Central Florida |
#10
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I had used that chip for several years, with a 2.5kHz reference frequency,
and never ran into those kinds of problems. My first iteration of that synthesizer did have some high level reference sidebands (-40dBc), but after I redid the board with a top layer ground plane, all of the problems cleared up. Are you using a ground plane on your board? Are you also using that anti-slewing filter at the op-amp input, whereby you split one of the Rs, and use a shunt C between the two? If you would like a schematic of my loop filter, give me a shout. Pete Michael A. Terrell wrote in message ... Damien Teney wrote: Hello, About the quartz, I haven't used a 10.24MHz one as in the given schematic, but a 5.12 MHz one. The R ratio is 1024, so the reference frequency is 5 KHz. The N ratio used is from 196 to 284 (with the 64/65 prescaler; VCO goes from 63 to 91 MHz). I don't think the loop is unstable, because the VCO output is quite clean (only a bit blur, see http://www.mcarsweb.com/_divers/vco.jpg). The loop filter values have been calculated with the fomulas given in the motorola application note 980. So, if you think I should use a additional RC network, could you tell me how to calculate the values :-$ ? Thank you ;-) Damien Do you have a 5 kHz notch filter in the control voltage feeding your VCO? It will reduce phase noise in the output. A simple L/C trap will work, but either the coil or cap should be adjustable for maximum rejection. -- Michael A. Terrell Central Florida |
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