In article ,
(Mike W) writes:

I have a need to produce an accurate 4Mhz 50% dutycycle TTL squarewave
to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy. How can I
divide this to produce the 50% duty cycle 4Mhz signal?. Is it even
possible with logic alone?. I can see how to mix with either 6Mhz or
14Mhz, but this then detracts from the required accuracy.

A more direct way, with very little jitter, is to double the 10 MHz
reference with a dual diode arrangment, output tuned to 20 MHz,
then into amplification (if needed), through a Schmitt inverter,
another (!) dual diode doubler with output tuned to 40 MHz. Again
amplification (if needed) and another Schmitt inverter to square
up the 40 MHz. Divide the 40 MHz by 10 in a Johnson counter to
achieve the 50% duty cycle. Broad tuning, no real problems there.
Very direct. Minimal jitter.

Johnson counters aren't common but they aren't made from
unobtainium either. The CD4017 is an example and still available
although it isn't fast enough for this application. Dividing by 10 via
a Johnson counter needs a 5-stage shift register arrangement
which can be done from 74LS or 74F or 74AC components (a
4-bit SR IC plus a flip-flop to complete the 5 stages).

If operating at slower rates, the 50% duty cycle would appear at
the "Carry Out" pin of a CD4017.

A good simple explanation of Johnson counters is at:

http://www.play-hookey.com/digital/johnson_counter.html

Some other suggestions might suggest themselves if you explain
the "timebase" in more detail.

Len Anderson
retired (from regular hours) electronic engineer person

On Wed, 18 Feb 2004 13:07:48 -0000, "Hans Summers"
wrote:


"budgie" wrote in message
.. .
On Wed, 18 Feb 2004 09:17:11 GMT, (Mike W)
wrote:

I have a need to produce an accurate 4Mhz 50% dutycycle TTL squarewave
to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy. How can I
divide this to produce the 50% duty cycle 4Mhz signal?. Is it even
possible with logic alone?. I can see how to mix with either 6Mhz or
14Mhz, but this then detracts from the required accuracy.

Several approaches spring to mind. You stated "accurate" - they all
provide
that, but jitter is introduced in all of them:

1. VCO at 4MHz, divide by 4 and lock to Fref = 1MHz from your 10 Meg
source
divided by ten.

2. VCO at a multiple of 10M - say 40 MHz - locked to your 10M ref and
divided down (by in this case 10) to give 4 MHz output.


I would suggest using a 4MHz crystal oscillator as your VCO. Small varicap
to alter the VXO frequency (or use an ordinary diode or LED as the varicap,
see http://www.hanssummers.com/radio/varicap/varicap.htm). The inherent
stability of the VXO will allow you to use a very slow PLL, which will
result in minimal jitter.

Agreed, a VCXO is a good way to go if you do need a VCO.

Remember, the o/p didn't reference any jitter sensitivity in the task, which may
be simple timing or gated counting of a pulse train. Neither is
jitter-sensitive.

If jitter isn't an issue, I'd personally KISS and go with #3. Small footprint,
small dissipation, no tuned circuits, no PLL parameters to calculate, no VCO's
to build, no VCXO's or xtals to buy. Only one RC time constant to calculate (or
optimise by SOT) to minimise jitter if inclined to bother.

On Wed, 18 Feb 2004 13:07:48 -0000, "Hans Summers"
wrote:


"budgie" wrote in message
.. .
On Wed, 18 Feb 2004 09:17:11 GMT, (Mike W)
wrote:

I have a need to produce an accurate 4Mhz 50% dutycycle TTL squarewave
to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy. How can I
divide this to produce the 50% duty cycle 4Mhz signal?. Is it even
possible with logic alone?. I can see how to mix with either 6Mhz or
14Mhz, but this then detracts from the required accuracy.

Several approaches spring to mind. You stated "accurate" - they all
provide
that, but jitter is introduced in all of them:

1. VCO at 4MHz, divide by 4 and lock to Fref = 1MHz from your 10 Meg
source
divided by ten.

2. VCO at a multiple of 10M - say 40 MHz - locked to your 10M ref and
divided down (by in this case 10) to give 4 MHz output.


I would suggest using a 4MHz crystal oscillator as your VCO. Small varicap
to alter the VXO frequency (or use an ordinary diode or LED as the varicap,
see http://www.hanssummers.com/radio/varicap/varicap.htm). The inherent
stability of the VXO will allow you to use a very slow PLL, which will
result in minimal jitter.

Agreed, a VCXO is a good way to go if you do need a VCO.

Remember, the o/p didn't reference any jitter sensitivity in the task, which may
be simple timing or gated counting of a pulse train. Neither is
jitter-sensitive.

If jitter isn't an issue, I'd personally KISS and go with #3. Small footprint,
small dissipation, no tuned circuits, no PLL parameters to calculate, no VCO's
to build, no VCXO's or xtals to buy. Only one RC time constant to calculate (or
optimise by SOT) to minimise jitter if inclined to bother.

Thankyou everyone for your ideas.
I think I'll go with the VCXO phase locked to the 10Mhz reference.
Why did'nt I think of that ;-(
atb Mike W
--

Thankyou everyone for your ideas.
I think I'll go with the VCXO phase locked to the 10Mhz reference.
Why did'nt I think of that ;-(
atb Mike W
--

Do you need the accuracy of the frequency standard? Why not just buy a
little 4MHz CMOS crystal oscillator?

If jitter and accuracy were important I'd either (hobby use) build a VXCO
with an 8MHz crystal referenced to 2MHz from the standard or (for a customer
design) buy an integrated 4MHz VXCO and reference it to 2MHz from the
standard. In either case I'd use the phase comparator from a 74HC4046 or an
exclusive OR gate. You'll be using a divide-by 5 which can be had from a
74HC390 if they're still available, and a divide-by 2 or 4, which can be had
from just about anything -- including the same 74HC390 if your hookup is a
little perverse. All the logic _could_ be done on a PAL, of course.

Come to think of it if absolute accuracy is important but jitter isn't you
can just use the oscillator from the '4046 as well, with the same division
scheme.

--------------------------------------
Tim Wescott
Wescott Design Services
http://www.wescottdesign.com


"Mike W" wrote in message
...
I have a need to produce an accurate 4Mhz 50% dutycycle TTL squarewave
to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy. How can I
divide this to produce the 50% duty cycle 4Mhz signal?. Is it even
possible with logic alone?. I can see how to mix with either 6Mhz or
14Mhz, but this then detracts from the required accuracy.

atb Mikw

Do you need the accuracy of the frequency standard? Why not just buy a
little 4MHz CMOS crystal oscillator?

If jitter and accuracy were important I'd either (hobby use) build a VXCO
with an 8MHz crystal referenced to 2MHz from the standard or (for a customer
design) buy an integrated 4MHz VXCO and reference it to 2MHz from the
standard. In either case I'd use the phase comparator from a 74HC4046 or an
exclusive OR gate. You'll be using a divide-by 5 which can be had from a
74HC390 if they're still available, and a divide-by 2 or 4, which can be had
from just about anything -- including the same 74HC390 if your hookup is a
little perverse. All the logic _could_ be done on a PAL, of course.

Come to think of it if absolute accuracy is important but jitter isn't you
can just use the oscillator from the '4046 as well, with the same division
scheme.

--------------------------------------
Tim Wescott
Wescott Design Services
http://www.wescottdesign.com


"Mike W" wrote in message
...
I have a need to produce an accurate 4Mhz 50% dutycycle TTL squarewave
to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy. How can I
divide this to produce the 50% duty cycle 4Mhz signal?. Is it even
possible with logic alone?. I can see how to mix with either 6Mhz or
14Mhz, but this then detracts from the required accuracy.

atb Mikw

"Mike W" wrote in message
...
I have a need to produce an accurate 4Mhz 50% dutycycle
TTL squarewave to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy.
How can I divide this to produce the 50% duty cycle 4Mhz
signal?. Is it even possible with logic alone?. I can
see how to mix with either 6Mhz or 14Mhz, but this then
detracts from the required accuracy.


I'd be tempted to use a PAL chip. It is possible to make a multiply by 4
and then divide by 10 in the same chip, which would make the total parts
required to get the 4 MHz 50% Sq Wave your original 10 MHz input and a
single chip.


Jim Pennell
N6BIU

"Mike W" wrote in message
...
I have a need to produce an accurate 4Mhz 50% dutycycle
TTL squarewave to use as a timebase.

I have a 10Mhz IQD frequency standard of suitable accuracy.
How can I divide this to produce the 50% duty cycle 4Mhz
signal?. Is it even possible with logic alone?. I can
see how to mix with either 6Mhz or 14Mhz, but this then
detracts from the required accuracy.


I'd be tempted to use a PAL chip. It is possible to make a multiply by 4
and then divide by 10 in the same chip, which would make the total parts
required to get the 4 MHz 50% Sq Wave your original 10 MHz input and a
single chip.


Jim Pennell
N6BIU

On Fri, 20 Feb 2004 03:08:14 GMT, "Jim Pennell"
wrote:



I'd be tempted to use a PAL chip. It is possible to make a multiply by 4
and then divide by 10 in the same chip, which would make the total parts
required to get the 4 MHz 50% Sq Wave your original 10 MHz input and a
single chip.


Mice one Jim.
1. buy your PAL programmer
2. buy your PAL
3. learn how to obtain the required function
4. burn the PAL and discover it does'nt work
5. while patience lasts go to 2. wend
6. revert to PLL