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Old July 25th 06, 07:32 AM posted to rec.radio.amateur.homebrew
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Posts: 30
Default Biasing of Dual Gate Fets

Hi,

Pretty fundamental I know but can someone please explain the steps for
setting up bias for a Dual Gate MOSFET.

I know I could place a pot on the gate and source for each circuit and
play with values but I would like a method that enables me to calculate
the values.

The main issue is how to determine values for Rs and Gate 2 Voltage.

I am using BF998 and want to have a "play" at 5V and 8V supply.

The formulae for Id is Id = Idss(1-Vgs/Vp) ^ 2
But Idss is stated as 2-18mA
Vp Gate 1 is given as a range from 1-2V
Vp gate 2 is given as range from 0.5 to 1.5V

If I apply say 4V to G1 and 0V to G2, how do I calculate the voltage at
the source to determine Vgs ?

Any help much appreciated.

Regards

David
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Old July 25th 06, 02:22 PM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jul 2006
Posts: 4
Default Biasing of Dual Gate Fets

Hi David,

Some will ask what you are designing before they can give you an
answer.

FYI

http://users.easystreet.com/w7zoi/lna50.htm

Don



David wrote:
Hi,

Pretty fundamental I know but can someone please explain the steps for
setting up bias for a Dual Gate MOSFET.


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Old July 25th 06, 06:06 PM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jul 2006
Posts: 8
Default Biasing of Dual Gate Fets

David wrote:



Hi,

Pretty fundamental I know but can someone please explain the steps for
setting up bias for a Dual Gate MOSFET.

I know I could place a pot on the gate and source for each circuit and
play with values but I would like a method that enables me to calculate
the values.

The main issue is how to determine values for Rs and Gate 2 Voltage.

I am using BF998 and want to have a "play" at 5V and 8V supply.

The formulae for Id is Id = Idss(1-Vgs/Vp) ^ 2
But Idss is stated as 2-18mA
Vp Gate 1 is given as a range from 1-2V
Vp gate 2 is given as range from 0.5 to 1.5V

If I apply say 4V to G1 and 0V to G2, how do I calculate the voltage at
the source to determine Vgs ?

Any help much appreciated.

Regards

David



One way of doing this is to get the datasheet for the FET you are using.
There should be a graph that shows the operating characteristic curves. The
x-axis will be Vds and the Y-axis will be the drain current Id. The
characteristic curves will be for various levels of Vgs. Pick an operating
point based on the type of amplifier you want. Let's suppose it will be
Class A. Assume the FET has a power supply voltage of 40v and an Idss of
10ma. Let's say that you pick a point in the middle of the operating curves
that gives an Id of 6ma and a Vds of 20v in order to get the maximum swing
out of the amplifer. Looking at the characteristic curves shows that this
will require a Vgs of about -1v. Now you have everything you need.

If Vgs needs to be -1v and Id is 6ma (assume Id and Is will be the same) you
need a resistor of Vd/Id (R = V/I) or about 166 ohms.

The gate resistor you see in FET amps is not really there for biasing but
more to set the input impedance of the amplifier. As long as the leakage
current from the gate to the source is small, Vgs is set by the bias
resistor in the source lead.

tim ab0wr


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Old July 26th 06, 02:33 AM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jul 2006
Posts: 30
Default Biasing of Dual Gate Fets

Tim,


Thanks for the info.

So, say I wanted to set the bias up at 10mA.

I find the Vd/Id curve on the datasheet.

If I have say a 8V power supply and decide to use a choke in the drain.
This gives me Vd of around 8V. The curve indicates that VGs1 should be
0V and VGs2 = 4V.

This means Rs would be 8/10mA = 800R.

Where I am now confused is that VGS voltages are the Gate to source
voltage. If the source voltage is 8V from the example above then to get
VGS2 of 4V then the bias on VG2 would need to be 12V ?
Also if VGs1 = 0V then the actual voltage on G1 should be 4V ?

Is this correct or am I misinterpreting something here ?

Thanks.

Regards

David

tim gorman wrote:
David wrote:


Hi,

Pretty fundamental I know but can someone please explain the steps for
setting up bias for a Dual Gate MOSFET.

I know I could place a pot on the gate and source for each circuit and
play with values but I would like a method that enables me to calculate
the values.

The main issue is how to determine values for Rs and Gate 2 Voltage.

I am using BF998 and want to have a "play" at 5V and 8V supply.

The formulae for Id is Id = Idss(1-Vgs/Vp) ^ 2
But Idss is stated as 2-18mA
Vp Gate 1 is given as a range from 1-2V
Vp gate 2 is given as range from 0.5 to 1.5V

If I apply say 4V to G1 and 0V to G2, how do I calculate the voltage at
the source to determine Vgs ?

Any help much appreciated.

Regards

David



One way of doing this is to get the datasheet for the FET you are using.
There should be a graph that shows the operating characteristic curves. The
x-axis will be Vds and the Y-axis will be the drain current Id. The
characteristic curves will be for various levels of Vgs. Pick an operating
point based on the type of amplifier you want. Let's suppose it will be
Class A. Assume the FET has a power supply voltage of 40v and an Idss of
10ma. Let's say that you pick a point in the middle of the operating curves
that gives an Id of 6ma and a Vds of 20v in order to get the maximum swing
out of the amplifer. Looking at the characteristic curves shows that this
will require a Vgs of about -1v. Now you have everything you need.

If Vgs needs to be -1v and Id is 6ma (assume Id and Is will be the same) you
need a resistor of Vd/Id (R = V/I) or about 166 ohms.

The gate resistor you see in FET amps is not really there for biasing but
more to set the input impedance of the amplifier. As long as the leakage
current from the gate to the source is small, Vgs is set by the bias
resistor in the source lead.

tim ab0wr


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Old July 26th 06, 10:52 AM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jul 2006
Posts: 30
Default Biasing of Dual Gate Fets

OK, I think I got it.

Let's say I want Vdd = 8V. Say I have an RF chock in the Drain then Vds
is almost 8V.

Say I want 5mA bias current.

I look at the Vds vs Id and find that VG1-s = -0.2V for this condition.
(So actual VDs is 7.8V)

Next I use a source resistor of VG1-s/ Id = 40 Ohms
As VG1 = VG1-s + VG1 - IDxRS the Gate voltage applied is 0V.

The graph on the datasheet mentions that this is the output when VG2-s
is 4V.

So now I calculate VG2 = VG2-s + ID x RS = 4.2V

I suppose that I can make Rs smaller to the point where VG1-s is 0V on
the graph.(Occurs at 10mA for BF998).

If I want higher Q point I then add positive bias to V1. I also
understand I can get around 10dB attenuation by lowering VG2-s from 4.2V
towards 0V but need to make it negative if I want to switch the signal
off altogether (If I was to use the FET as say a ASK or OOK modulator).

Thanks



tim gorman wrote:
David wrote:


Hi,

Pretty fundamental I know but can someone please explain the steps for
setting up bias for a Dual Gate MOSFET.

I know I could place a pot on the gate and source for each circuit and
play with values but I would like a method that enables me to calculate
the values.

The main issue is how to determine values for Rs and Gate 2 Voltage.

I am using BF998 and want to have a "play" at 5V and 8V supply.

The formulae for Id is Id = Idss(1-Vgs/Vp) ^ 2
But Idss is stated as 2-18mA
Vp Gate 1 is given as a range from 1-2V
Vp gate 2 is given as range from 0.5 to 1.5V

If I apply say 4V to G1 and 0V to G2, how do I calculate the voltage at
the source to determine Vgs ?

Any help much appreciated.

Regards

David



One way of doing this is to get the datasheet for the FET you are using.
There should be a graph that shows the operating characteristic curves. The
x-axis will be Vds and the Y-axis will be the drain current Id. The
characteristic curves will be for various levels of Vgs. Pick an operating
point based on the type of amplifier you want. Let's suppose it will be
Class A. Assume the FET has a power supply voltage of 40v and an Idss of
10ma. Let's say that you pick a point in the middle of the operating curves
that gives an Id of 6ma and a Vds of 20v in order to get the maximum swing
out of the amplifer. Looking at the characteristic curves shows that this
will require a Vgs of about -1v. Now you have everything you need.

If Vgs needs to be -1v and Id is 6ma (assume Id and Is will be the same) you
need a resistor of Vd/Id (R = V/I) or about 166 ohms.

The gate resistor you see in FET amps is not really there for biasing but
more to set the input impedance of the amplifier. As long as the leakage
current from the gate to the source is small, Vgs is set by the bias
resistor in the source lead.

tim ab0wr




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Old July 27th 06, 12:12 AM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jul 2006
Posts: 8
Default Biasing of Dual Gate Fets

David wrote:



Tim,


Thanks for the info.

So, say I wanted to set the bias up at 10mA.

I find the Vd/Id curve on the datasheet.

If I have say a 8V power supply and decide to use a choke in the drain.
This gives me Vd of around 8V. The curve indicates that VGs1 should be
0V and VGs2 = 4V.

This means Rs would be 8/10mA = 800R.

Where I am now confused is that VGS voltages are the Gate to source
voltage. If the source voltage is 8V from the example above then to get
VGS2 of 4V then the bias on VG2 would need to be 12V ?
Also if VGs1 = 0V then the actual voltage on G1 should be 4V ?

Is this correct or am I misinterpreting something here ?

Thanks.

Regards

David

tim gorman wrote:
David wrote:


Hi,

Pretty fundamental I know but can someone please explain the steps for
setting up bias for a Dual Gate MOSFET.

I know I could place a pot on the gate and source for each circuit and
play with values but I would like a method that enables me to calculate
the values.

The main issue is how to determine values for Rs and Gate 2 Voltage.

I am using BF998 and want to have a "play" at 5V and 8V supply.

The formulae for Id is Id = Idss(1-Vgs/Vp) ^ 2
But Idss is stated as 2-18mA
Vp Gate 1 is given as a range from 1-2V
Vp gate 2 is given as range from 0.5 to 1.5V

If I apply say 4V to G1 and 0V to G2, how do I calculate the voltage at
the source to determine Vgs ?

Any help much appreciated.

Regards

David



One way of doing this is to get the datasheet for the FET you are using.
There should be a graph that shows the operating characteristic curves.
The x-axis will be Vds and the Y-axis will be the drain current Id. The
characteristic curves will be for various levels of Vgs. Pick an
operating point based on the type of amplifier you want. Let's suppose it
will be Class A. Assume the FET has a power supply voltage of 40v and an
Idss of 10ma. Let's say that you pick a point in the middle of the
operating curves that gives an Id of 6ma and a Vds of 20v in order to get
the maximum swing out of the amplifer. Looking at the characteristic
curves shows that this will require a Vgs of about -1v. Now you have
everything you need.

If Vgs needs to be -1v and Id is 6ma (assume Id and Is will be the same)
you
need a resistor of Vd/Id (R = V/I) or about 166 ohms.

The gate resistor you see in FET amps is not really there for biasing but
more to set the input impedance of the amplifier. As long as the leakage
current from the gate to the source is small, Vgs is set by the bias
resistor in the source lead.

tim ab0wr



I'm sorry, I should have picked up on the fact that you are using a
dual-gate mosfet.

A dual-gate mosfet is a lot like 2 fet's in series. Gate2 is usually used
with an external bias to set the dynamic range of the device. The signal is
usually associated with Gate1. You can apply a fixed bias to Gate2 or tie
in something like an AGC signal to vary the device amplification.

For this type of device you probably would be better off looking at the
graph of the Transfer Characteristics. The graph will show the change in Id
for changes in Vgs1 with Vgs2 at a fixed value.

For your device I would probably run Vgs2 at 3v to 4v. Looking at the
transfer graph, you would want Vgs2 to be around 0.1v to get in the middle
of the linear curve. That would put your standing Id at about 9-11 mA.

This would make your source resistor 0.1v/10mA = 10R.

Remember that you'll want to breadboard the circuit and try this out before
actually including it in a production unit. Use a fixed voltage divider to
get the 4v for Vgs2 and a source resistor of 10R and see how the circuit
works. You can always change the source resistor to get what you need.

tim ab0wr
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Old July 27th 06, 03:44 AM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jul 2006
Posts: 30
Default Biasing of Dual Gate Fets

Tim,

Say we look at VG1s = 0.1V as per your example.

The graph for BF998 shows that if VG2s = 4V and VDs = 8V then ID approx
= 12.5mA

This would mean that unless I applied a negative voltage on the source I
would need to apply 0.1V forward bias to G1 and 4V to G2 ?
As Rs is creating a negative self bias voltage ?

If I set the bias point lower - say 5mA then VG1s is approx. -0.2V
according to the graph.

I can achieve this by using a resistor in the source of 0.2/5mA (40
Ohms) and then set VG1 = 0 (so that VG1s = -0.2V) and then 4.2V on G2
so that VG2s = 4V.

Is this correct ?

The transfer characteristic curve shows that for say 10mA. If VG2s = 4V
then gm = around 24mS and if VG2s is reduced to 0V the gm reduces to
about 7mS.

Thanks

regards

David



tim gorman wrote:
David wrote:


Tim,


Thanks for the info.

So, say I wanted to set the bias up at 10mA.

I find the Vd/Id curve on the datasheet.

If I have say a 8V power supply and decide to use a choke in the drain.
This gives me Vd of around 8V. The curve indicates that VGs1 should be
0V and VGs2 = 4V.

This means Rs would be 8/10mA = 800R.

Where I am now confused is that VGS voltages are the Gate to source
voltage. If the source voltage is 8V from the example above then to get
VGS2 of 4V then the bias on VG2 would need to be 12V ?
Also if VGs1 = 0V then the actual voltage on G1 should be 4V ?

Is this correct or am I misinterpreting something here ?

Thanks.

Regards

David

tim gorman wrote:
David wrote:

Hi,

Pretty fundamental I know but can someone please explain the steps for
setting up bias for a Dual Gate MOSFET.

I know I could place a pot on the gate and source for each circuit and
play with values but I would like a method that enables me to calculate
the values.

The main issue is how to determine values for Rs and Gate 2 Voltage.

I am using BF998 and want to have a "play" at 5V and 8V supply.

The formulae for Id is Id = Idss(1-Vgs/Vp) ^ 2
But Idss is stated as 2-18mA
Vp Gate 1 is given as a range from 1-2V
Vp gate 2 is given as range from 0.5 to 1.5V

If I apply say 4V to G1 and 0V to G2, how do I calculate the voltage at
the source to determine Vgs ?

Any help much appreciated.

Regards

David

One way of doing this is to get the datasheet for the FET you are using.
There should be a graph that shows the operating characteristic curves.
The x-axis will be Vds and the Y-axis will be the drain current Id. The
characteristic curves will be for various levels of Vgs. Pick an
operating point based on the type of amplifier you want. Let's suppose it
will be Class A. Assume the FET has a power supply voltage of 40v and an
Idss of 10ma. Let's say that you pick a point in the middle of the
operating curves that gives an Id of 6ma and a Vds of 20v in order to get
the maximum swing out of the amplifer. Looking at the characteristic
curves shows that this will require a Vgs of about -1v. Now you have
everything you need.

If Vgs needs to be -1v and Id is 6ma (assume Id and Is will be the same)
you
need a resistor of Vd/Id (R = V/I) or about 166 ohms.

The gate resistor you see in FET amps is not really there for biasing but
more to set the input impedance of the amplifier. As long as the leakage
current from the gate to the source is small, Vgs is set by the bias
resistor in the source lead.

tim ab0wr



I'm sorry, I should have picked up on the fact that you are using a
dual-gate mosfet.

A dual-gate mosfet is a lot like 2 fet's in series. Gate2 is usually used
with an external bias to set the dynamic range of the device. The signal is
usually associated with Gate1. You can apply a fixed bias to Gate2 or tie
in something like an AGC signal to vary the device amplification.

For this type of device you probably would be better off looking at the
graph of the Transfer Characteristics. The graph will show the change in Id
for changes in Vgs1 with Vgs2 at a fixed value.

For your device I would probably run Vgs2 at 3v to 4v. Looking at the
transfer graph, you would want Vgs2 to be around 0.1v to get in the middle
of the linear curve. That would put your standing Id at about 9-11 mA.

This would make your source resistor 0.1v/10mA = 10R.

Remember that you'll want to breadboard the circuit and try this out before
actually including it in a production unit. Use a fixed voltage divider to
get the 4v for Vgs2 and a source resistor of 10R and see how the circuit
works. You can always change the source resistor to get what you need.

tim ab0wr

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Old July 27th 06, 10:15 PM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jun 2006
Posts: 1,374
Default Biasing of Dual Gate Fets

The problem with using FETs of all kinds is the wide part-to-part
variation. Look at the specs for the BF998 - many of the critical specs
show only a maximum or minimum, but not both, or just a typical value.
You can be way off if you simply use a "typical" set of curves. If you
want to do an analytical design with a part with non-specifications like
this is to use a curve tracer to generate curves for the individual
part, then use those curves for your design. Pull another part of the
same part number from your drawer, and you'll need a different design.
This exercise is useful for educational purposes, but it isn't a
technique you can use to design something that can be easily duplicated.

That's probably why you don't see a lot of FETs being used in commercial
products, except in applications where there's a lot of feedback to
stabilize the operating point, such as source followers, or when simply
nothing else will do. Even then, the manufacturer has probably paid the
vendor to select parts with a much narrower, and well specified, range
of characteristic values. That's been my experience in designing
commercial electronic test equipment.

Roy Lewallen, W7EL

David wrote:
Tim,

Say we look at VG1s = 0.1V as per your example.

The graph for BF998 shows that if VG2s = 4V and VDs = 8V then ID approx
= 12.5mA

This would mean that unless I applied a negative voltage on the source I
would need to apply 0.1V forward bias to G1 and 4V to G2 ?
As Rs is creating a negative self bias voltage ?

If I set the bias point lower - say 5mA then VG1s is approx. -0.2V
according to the graph.

I can achieve this by using a resistor in the source of 0.2/5mA (40
Ohms) and then set VG1 = 0 (so that VG1s = -0.2V) and then 4.2V on G2
so that VG2s = 4V.

Is this correct ?

The transfer characteristic curve shows that for say 10mA. If VG2s = 4V
then gm = around 24mS and if VG2s is reduced to 0V the gm reduces to
about 7mS.

Thanks

regards

David

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Old July 27th 06, 11:43 PM posted to rec.radio.amateur.homebrew
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First recorded activity by RadioBanter: Jul 2006
Posts: 8
Default Biasing of Dual Gate Fets

What you say makes sense. Breadboard up a circuit and see what your idle
point winds up being. That's really the only way you will find out for
sure.

tim ab0wr

David wrote:



Tim,

Say we look at VG1s = 0.1V as per your example.

The graph for BF998 shows that if VG2s = 4V and VDs = 8V then ID approx
= 12.5mA

This would mean that unless I applied a negative voltage on the source I
would need to apply 0.1V forward bias to G1 and 4V to G2 ?
As Rs is creating a negative self bias voltage ?

If I set the bias point lower - say 5mA then VG1s is approx. -0.2V
according to the graph.

I can achieve this by using a resistor in the source of 0.2/5mA (40
Ohms) and then set VG1 = 0 (so that VG1s = -0.2V) and then 4.2V on G2
so that VG2s = 4V.

Is this correct ?

The transfer characteristic curve shows that for say 10mA. If VG2s = 4V
then gm = around 24mS and if VG2s is reduced to 0V the gm reduces to
about 7mS.

Thanks

regards

David



tim gorman wrote:
David wrote:


Tim,


Thanks for the info.

So, say I wanted to set the bias up at 10mA.

I find the Vd/Id curve on the datasheet.

If I have say a 8V power supply and decide to use a choke in the drain.
This gives me Vd of around 8V. The curve indicates that VGs1 should be
0V and VGs2 = 4V.

This means Rs would be 8/10mA = 800R.

Where I am now confused is that VGS voltages are the Gate to source
voltage. If the source voltage is 8V from the example above then to get
VGS2 of 4V then the bias on VG2 would need to be 12V ?
Also if VGs1 = 0V then the actual voltage on G1 should be 4V ?

Is this correct or am I misinterpreting something here ?

Thanks.

Regards

David

tim gorman wrote:
David wrote:

Hi,

Pretty fundamental I know but can someone please explain the steps for
setting up bias for a Dual Gate MOSFET.

I know I could place a pot on the gate and source for each circuit and
play with values but I would like a method that enables me to
calculate the values.

The main issue is how to determine values for Rs and Gate 2 Voltage.

I am using BF998 and want to have a "play" at 5V and 8V supply.

The formulae for Id is Id = Idss(1-Vgs/Vp) ^ 2
But Idss is stated as 2-18mA
Vp Gate 1 is given as a range from 1-2V
Vp gate 2 is given as range from 0.5 to 1.5V

If I apply say 4V to G1 and 0V to G2, how do I calculate the voltage
at the source to determine Vgs ?

Any help much appreciated.

Regards

David

One way of doing this is to get the datasheet for the FET you are
using. There should be a graph that shows the operating characteristic
curves. The x-axis will be Vds and the Y-axis will be the drain current
Id. The characteristic curves will be for various levels of Vgs. Pick
an operating point based on the type of amplifier you want. Let's
suppose it will be Class A. Assume the FET has a power supply voltage
of 40v and an Idss of 10ma. Let's say that you pick a point in the
middle of the operating curves that gives an Id of 6ma and a Vds of 20v
in order to get the maximum swing out of the amplifer. Looking at the
characteristic curves shows that this will require a Vgs of about -1v.
Now you have everything you need.

If Vgs needs to be -1v and Id is 6ma (assume Id and Is will be the
same) you
need a resistor of Vd/Id (R = V/I) or about 166 ohms.

The gate resistor you see in FET amps is not really there for biasing
but more to set the input impedance of the amplifier. As long as the
leakage current from the gate to the source is small, Vgs is set by the
bias resistor in the source lead.

tim ab0wr



I'm sorry, I should have picked up on the fact that you are using a
dual-gate mosfet.

A dual-gate mosfet is a lot like 2 fet's in series. Gate2 is usually used
with an external bias to set the dynamic range of the device. The signal
is usually associated with Gate1. You can apply a fixed bias to Gate2 or
tie in something like an AGC signal to vary the device amplification.

For this type of device you probably would be better off looking at the
graph of the Transfer Characteristics. The graph will show the change in
Id for changes in Vgs1 with Vgs2 at a fixed value.

For your device I would probably run Vgs2 at 3v to 4v. Looking at the
transfer graph, you would want Vgs2 to be around 0.1v to get in the
middle of the linear curve. That would put your standing Id at about 9-11
mA.

This would make your source resistor 0.1v/10mA = 10R.

Remember that you'll want to breadboard the circuit and try this out
before actually including it in a production unit. Use a fixed voltage
divider to get the 4v for Vgs2 and a source resistor of 10R and see how
the circuit works. You can always change the source resistor to get what
you need.

tim ab0wr


  #10   Report Post  
Old July 28th 06, 08:08 AM posted to rec.radio.amateur.homebrew
external usenet poster
 
First recorded activity by RadioBanter: Jul 2006
Posts: 30
Default Biasing of Dual Gate Fets

Roy,

So if I had an adjustment on VG2 for each circuit and adjust for
required Drain current on each product ?

What's the consensus regarding Common Base BJT as LNA ?

Thanks

Regards

David


Roy Lewallen wrote:
The problem with using FETs of all kinds is the wide part-to-part
variation. Look at the specs for the BF998 - many of the critical specs
show only a maximum or minimum, but not both, or just a typical value.
You can be way off if you simply use a "typical" set of curves. If you
want to do an analytical design with a part with non-specifications like
this is to use a curve tracer to generate curves for the individual
part, then use those curves for your design. Pull another part of the
same part number from your drawer, and you'll need a different design.
This exercise is useful for educational purposes, but it isn't a
technique you can use to design something that can be easily duplicated.

That's probably why you don't see a lot of FETs being used in commercial
products, except in applications where there's a lot of feedback to
stabilize the operating point, such as source followers, or when simply
nothing else will do. Even then, the manufacturer has probably paid the
vendor to select parts with a much narrower, and well specified, range
of characteristic values. That's been my experience in designing
commercial electronic test equipment.

Roy Lewallen, W7EL

David wrote:
Tim,

Say we look at VG1s = 0.1V as per your example.

The graph for BF998 shows that if VG2s = 4V and VDs = 8V then ID
approx = 12.5mA

This would mean that unless I applied a negative voltage on the source
I would need to apply 0.1V forward bias to G1 and 4V to G2 ?
As Rs is creating a negative self bias voltage ?

If I set the bias point lower - say 5mA then VG1s is approx. -0.2V
according to the graph.

I can achieve this by using a resistor in the source of 0.2/5mA (40
Ohms) and then set VG1 = 0 (so that VG1s = -0.2V) and then 4.2V on G2
so that VG2s = 4V.

Is this correct ?

The transfer characteristic curve shows that for say 10mA. If VG2s =
4V then gm = around 24mS and if VG2s is reduced to 0V the gm reduces
to about 7mS.

Thanks

regards

David

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